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#1 Re: General » Verifying properties that may hold » 2013-06-29 18:42:25

Perhaps it is better to state a property that I *do* want to verify with SPIN. I have revised my model:

bool alive;

active proctype Foo(){
alive = true;
do
:: alive = false -> skip;
:: skip -> 
   progess: skip ;
od
}

In my revised model, one can intuitively see that execution may switch 'alive' to be false. However, 'alive' may also be true forever. The key statement I would like to make is: "in SOME executions, 'alive' may be switched to false.".. or more succinctly " 'alive' may not always be forever true ". Is there an LTL formula that could be used with SPIN to verify this?

#2 Re: General » Verifying properties that may hold » 2013-06-29 15:48:21

Thank you.

I have a follow up question with respect to "What spin will prove is that the positive requirement can be violated, by showing that the negated requirement can be satisfied". Below is an example, a simple verification attempt based on '[] (sr -> <> rr)'. When you wanted to verify that messages may be lost, I want to verify that the boolean 'dead' may be true.

bool dead;

active proctype Foo(){
dead = false;
do
:: dead = true -> skip;
:: skip -> 
   progess: skip ;
od
}

#define alive ( !dead )

never  {    /* ! [] alive */
T0_init:
        do
        :: atomic { (! ((alive))) -> assert(!(! ((alive)))) }
        :: (1) -> goto T0_init
        od;
accept_all:
        skip
}

My positive requirement is that the alive symbol is always true i.e. '[] alive' therefore dead always false, which is intuitively not verifiable. "What spin will prove is that the positive requirement can be violated, by showing that the negated requirement can be satisfied." So, I try and verify the negated claim '! [] alive'. When I attempt to validate this never claim, however, I cannot.

verification result:
spin -a  test_negation.pml
gcc -DMEMLIM=1024 -O2 -DXUSAFE -w -o pan pan.c
./pan -m10000  -a -N never_0
Pid: 2039
warning: only one claim defined, -N ignored
warning: for p.o. reduction to be valid the never claim must be stutter-invariant
(never claims generated from LTL formulae are stutter-invariant)
pan:1: assertion violated  !( !( !(dead))) (at depth 4)
pan: wrote test_negation.pml.trail

(Spin Version 6.2.5 -- 3 May 2013)
Warning: Search not completed
	+ Partial Order Reduction

Full statespace search for:
	never claim         	+ (never_0)
	assertion violations	+ (if within scope of claim)
	acceptance   cycles 	+ (fairness disabled)
	invalid end states	- (disabled by never claim)

State-vector 28 byte, depth reached 4, errors: 1
        3 states, stored
        0 states, matched
        3 transitions (= stored+matched)
        0 atomic steps
hash conflicts:         0 (resolved)

Stats on memory usage (in Megabytes):
    0.000	equivalent memory usage for states (stored*(State-vector + overhead))
    0.291	actual memory usage for states
  128.000	memory used for hash table (-w24)
    0.534	memory used for DFS stack (-m10000)
  128.730	total actual memory usage

This doesn't seem to follow with the description from Section 4.3.2 of "The Model Checker SPIN". I must still be missing something?

#3 General » Missing parameters in send » 2013-06-27 19:56:38

robstewartuk
Replies: 1

Take the following simple model:

mtype = { Foo , Bar };
chan master = [10] of { mtype , int , int } ;

active proctype Master() {
chan sender;
int i , x ;
do
:: master ? Foo( i , x ) -> skip ;
:: master ? Bar( i ) -> skip;
od
}

active proctype Slave() {
do
:: master ! Foo( 5 , 10 ) -> skip ;
:: master ! Bar( 3 ) -> skip ;
od
}

I'd like to know whether there are any severe side effects to not satisfying all parameters for a message on a channel. The Foo constructor has only one int, Bar has two int's. When simulating, I see the following warnings:

11: warning: missing params in send
16: warning: missing params in next recv
17: warning: missing params in send

Is this a perfectly acceptable use of sending/receiving over channels?

#4 General » Verifying properties that may hold » 2013-06-27 19:19:09

robstewartuk
Replies: 5

I am not understanding the liveness verification in Section 4.3.2 of "The Model Checker SPIN" [1], It shows two properties that are verifiable. The first states "We would like to verify two properties. The first: a message can be lost. Violations of this requirement can be expressed in the formula:"

![](sr -> [] rr)

How many negations are there? There is one in the formula (!), and the generated never claim. I am struggling to understand:
* What this is proving. Is it stating:
** Sometimes a message is lost, and sometime it arrives?
** It is not true that always a message arrives? i.e. "The SPIN model checker verifies that it is not true that a message always arrives".
* Running the SPIN model checker on this property, is it verified if the verifier states:
** "pan:1: end state in claim reached (at..."
** "State-vector XXX byte, depth reached YYY, errors: 0"

Lastly, Section 4.3.2 doesn't describe the verification environment. While it does say that it is checking for liveness properties, it doesn't mention whether or not it is checking for non-progresss cycles or acceptance cycles (or whether weak fairness is enforced).

In an unrelated point - are there any visualisers freely available, that produce Buchi automata illustrations for LTL formula? e.g. Figure 4 of [1].

[1] - http://spinroot.com/gerard/pdf/inprint/ieee97.pdf

#5 Re: General » LTL generated claim fails to verify » 2013-01-08 16:15:05

Oh dead oh dear.

Don't I look stupid. -DVECTORSZ=1100 fixes everything, and the never claims are verified as I would expect.

#6 Re: General » LTL generated claim fails to verify » 2013-01-08 15:52:03

Hi, thanks.

I've spent a few hours trying to get to the root of this problem. There are no assertions in my code, and as you say, the never claim with the p propositional symbol cannot be violated. And on inspecting the lines on which each process is on following the "trail ends after... #processes 7" signal, I can see that some of them should be executable (variable assignment and so on).

However - I have seemingly solved the problem, though not at all how I would have expected to. At the bottom of my code, I have 7 never claims, all generated from LTL formula. To test each one, I have in the "verification" tab in ispin, selected "use claim" and typed in "never_0" or "never_1" or "never_2"... up to "never_6". The never claim "! [] p" was the bottom claim in the source code, and therefore in my mind "never_6". Indeed, when I look through the trail of the failed runs, it is executing lines within this never claim.

How did I fix it? I simply removed the other 6 never claims from my source code, leaving only this one. This time when I select "use claim", I leave the "claim name" box blank, as there is only one. This time, SPIN cannot find any violations in my never claim, and no errors are thrown. What is going on here? Am I misunderstanding the ispin interface for verifying never claims? This is the before and after runs:  https://gist.github.com/4484319 .

#7 General » LTL generated claim fails to verify » 2013-01-07 19:16:49

robstewartuk
Replies: 5

Hi,

I have a model that has a LTL generated never claim that I cannot verify with spin. It uses a propositional symbol 'p' which is always 1. I would expect the LTL formula '[] p' to therefore always be verifiable, as such in this never claim:

#define p 1
never  {    /* ! [] p */
T0_init:
        if
        :: (! ((p))) -> goto accept_all
        :: (1) -> goto T0_init
        fi;
accept_all:
        skip
}

However, this is not the case...

$ spin -a  model.pml
$ gcc -DMEMLIM=1024 -O2 -DXUSAFE -w -o pan pan.c
$ ./pan -m10000  -a -N never_6
To replay the error-trail, goto Simulate/Replay and select "Run"
..
spin: trail ends after 14 steps
MSC: ~G line 326

On line 326 is the "if" line in the never claim. I'm not sure what the "MSC: ~G" line means? Also, interestingly, the model includes 7 processes. If I comment out any one of the "run" lines i.e. reducing the model to 6 processes, then the never claim is successfully verified. I'm also not sure if this problem is something to do with liveliness of my model (is that the "~G" line?). I've tried inserting "progress: " labels prepended on the non-terminating do loops in my model, but no luck.

1) I'm surprised this never claim cannot be verified, as 'p' is always (1)
2) What is "~G" ?
3) Is there anything in the anomaly of 6 processes succeeding, 7 not so ?

#8 General » unreached states when verifying never claims » 2013-01-04 19:54:42

robstewartuk
Replies: 1

Hi,

I'm having difficulty understanding a problem I am having when verifying never claims generating from linear temporal logic formula's. I also do not fully understand the effects of selecting safety/non-progress/acceptance cycles in ispin's "verification" tab, in combination with "use never claim" - and I cannot find documentation in the book to describe the behaviours of these combinations.

I have a few never claims generated with:
$ spin -f ...

I'm uneasy with the amount of "unreached in" statements:
(23 of 83 states)
(32 of 65 states)
(6 of 27 states)
...

On inspection of the states that are not being reached, I can see that these states are reached when I simulate with a given seed. So I'm not sure why spin is not reaching them when trying to validate my never claims. I should perhaps add that it is not finding errors in LTL-generated never claims that I would expect violations to be found in, which gives me reason to be suspicious.

--
Rob

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